Knowledge Base

This is a brief discussion of the capabilities and limitations of using SPLat for PID control. Every system has some limits, and SPLat (as wonderful as we think it is!) is no exception. If you start out with some idea of where the limits lie you may save yourself a lot of grief later.

The practical limits for second generation SPLat boards (like SL99 and MMi99/MMi200) used for PID control are 10mS sampling time and 256 step (8-bit) analog resolution. In practice that means you can control processes with response times down to perhaps 100mS (10 sample times), and for which you can tolerate an overall accuracy of 1 part in 256, or 0.4%. The actual PID calculation takes about 3.5mS, so with a 10mS sampling time you will be using up 35% of the controller’s processing capacity. The boiler plate PID control program we provide you with uses up to 32 bytes of RAM, or 17% of what’s available in an MMi99 with V3.18 or later Firmware.

Since the above paragraph was written we have introduced MM202 and other controllers with 10-bit analog resolution (1024 steps). PID Assist has not been updated to accommodate that improvement. The code auto-generated by PID Assist can exploit it. The newer controllers are also faster, though we haven’t benchmarked the PID code.

PID control is about controlling continuous processes, that is to say something that is continuously and smoothly varying. SPLat is a digital controller that does things in discrete, time-sequential steps. That means that the basic nature of SPLat, or any other digital controller, is basically at odds with the continuous nature of PID control.

The way this conflict is resolved is that the digital device does its work in “lumps”, as is its nature, but does so many “lumps” per second that to the outside world it gives the illusion of being continuous. This is called sampling. A PID control implemented with a digital controller is called a “sampled” system.

It is important in a sampled system that the sampling rate, i.e. the number of samples per second, is high compared to the rate at which the controlled process can change. If the controlled process can significantly change its output in 1mS, but the controller can only sample every 10mS, then the controller has little chance of exerting effective control over the system. On the other hand, if the process can only change significantly on a time scale of seconds, minutes or hours, then a sampled control system with a 10mS sampling interval can work (you may even be able to use a lower sampling rate and hence use less of the controller’s time).

When using a digital system for PID control, the controller must convert the analog output of the process into a digital number before it can do any sums on it. This requires an analog to digital converter. The analog inputs on SPLat controllers use such a converter.

All analog to digital converters converts an analog input voltage, which can have an infinite number of possible values, into one of a finite range of numbers. The converters in most SPLat boards break down the 0-10V input voltage range into 256 steps, numbered 0-255. That means each number represents an input voltage range of 10/256 volts, or about 39mV. Thus, if the converter returns the number 45, it means the input voltage is somewhere between 44.5 and 45.5 times 39mV, or 1.736V to 1.775V, but where in that range it actually lies is unknown.

A similar conversion, from digital back to analog, takes place on the output of the controller. This too has a finite number of steps, which in the case of SPLat is 256.

Breaking down the voltage (or current, or temperature, or pressure or whatever you are controlling) range into discrete ranges is called quantisation. Quantisation leads to limitations on the controller accuracy. Possible consequences of quantisation error include loss of accuracy and random or cyclic fluctuations in the output (noise).

The PIDassist program lets you explore the effects of quantisation and sampling time. In its simulation mode you can simulate inputs and outputs with and without quantisation. It will also simulate output dithering, which is a tricky method of reducing the effects of output quantisation.

One particular aspect of quantisation that needs to be considered carefully is signals that only work across a proportion of the active range of the system’s inputs and outputs. For example, if you have a temperature input scaled 0 – 200°C, and the actual temperature has a working range of only 10°C, then with an 8-bit converter (256 steps), the actual number of steps over the working temperature range is only about 13. Such a small number could well lead to problems.