MMi202: CPU device
Note: This applies to the MMi202
The MMi202 can respond to UV instructions that address the CPU device. Some of the responses are dependent on the hardware configuration.
Board Type
The board will respond to the following board-type poll:
SPxPoll2 3,!CPU
by placing its board type identification number on U0 and U1. The response is a function of the type (model) of board and the number of connected XPice expansion boards (e.g. XBIO16, XIRO16, HIO16), FP16. The numbers can be fetched from U0 and U1 by the PushU instruction.
The following table defines the responses for the MMi203, MMi201and MMi200 with varying amounts of expansion:
| Configuration | U0 | (MMi202/3) | (MMi201) | (MMi200) |
| MMi20x | 0 | 76 | 64 | 53 |
| MMi20x+16XPice | 0 | 77 | 65 | 54 |
| MMi20x+32XPice | 0 | 78 | 66 | 55 |
| MMi20x+48XPice | 0 | 79 | 67 | 56 |
| MMi20x+64XPice | 0 | 80 | 68 | 57 |
Interpreting the number of XPice points can be a little tricky. For boards with segregated inputs and outputs, like XIRO16 and HIO16, each 8I/8O board corresponds to 16 XPice points. For the XBIO16, each bidirectional point corresponds to one input and one output (and appears as such on the SPLat/PC screen). That means one XBIO16 board gets counted as 32 XPice points although it only adds 16 I/O points to your configuration.
Total I/O capacity
The instruction
SPxChIn 0,!CPU
will return the following information in U, where it can be accessed with the PushU instruction:
| U0 | Number of digital inputs |
| U1 | Number of digital outputs |
| U2 | Number of analog inputs |
| U3 | Number of analog outputs |
As with the board type information, interpreting the number of XPice points can be a little tricky. The safest way to use this information is to differentiate between known configurations of your product. For example, you could sell a product with an optional feature that is controlled through an expansion board that may or may not be present.
Data Set Ready line
The MMi202contains a Data Set Ready (DSR) line on its communications interface.
The instruction
SPxCmd0 1,!CPU
will turn on (raise) DSR
The instruction
SPxCmd0 0,!CPU
will turn off (drop) DRS
The MMi203 does not have this pin
Earlier versions of this page referred to this pin as RTS. Because the female comms connector is pinned as a DCE (Data Communication Equipment) the correct name is Data Set Ready (RTS is an input on a DCE (aka modem)
PWM base frequency (Firmware V3.15 or later)
The analog outputs on the board are generated by a pulse width modulated digital pulse train which is filtered (averaged) by an analog filter to produce a DC output. Normally the frequency of the PWM pulse train is 16kHz. The base frequency can however be altered using the instruction:
SPxCmd1 0,!CPU
with register U0 preset to a value between 0 and 7. The resulting PWM frequencies are given in the following table:
| U0 | PWM frequency |
|---|---|
| 0 | 16kHz (Default) |
| 1 | 8kHz |
| 2 | 4kHz |
| 3 | 2kHz |
| 4 | 1kHz |
| 5 | 500Hz |
| 6 | 250Hz |
| 7 | 125Hz |
Any other value will result in a fatal runtime error.
All analog output pins are affected. This feature is designed to be used with PWM output circuits such as DC motor speed controls. Be aware that a low PWM frequency will have an impact on any actual analog (filtered DC) outputs. Our filter circuits are normally designed for the default PWM frequency. Using a much lower frequency will produce ripple in the DC output.
When used with an AnOut instruction, the resolution is 8 bits. With fAnOut it is 10 bits.
Modify SuperTimer 10mS clock interval (Dialect 20 or later)
You can change the basic 10mS SuperTimer clock interval to some other value. Set U0 to the required value in mS and then execute a
SPxCmd1 1,!CPU
This affects all timers that use the SuperTimer mechanism, which is any timer that can have a duration counter up to 16,777,215 (Pause, fSTTimeSince, WaitOnT, etc). If you set the interval to 1, the timing will run 10 times faster than normal. If you set it to 256, the timing will run 25.6 times slower than normal giving you a timing range of 49.7 days. Due to the resolution of the internal math, the re-scaling will produce an error of up to 0.2% at the slow end of the scale. The actual error will be the error produced by rounding 65,536/U0 to the nearest integer. If U0=0 it reverts to the default 10mS.
Note that it makes little sense to run the SuperTimers with a clock that is faster than the “loop time” of your program.
LCD backlight dimming control
The following applies only to MMi203 boards connected to a special dimmable LCD and fitted with V3.21 or later Firmware.
The following is old, and included for reference, or very special circumstances. The OBLCD_Dim instruction provides an easier way of controlling dimming.
The board/Firmware supports a timer that automatically dims the backlight after a set time interval with no user activity, as determined by presses of the front panel push buttons.
The code:
SetU 0,BL_HighLevel
SetU 1,BL_LowLevel
SPxCmd2 1,!CPU
will set the maximum, undimmed (BL_HighLevel) and minimum, dimmed (BL_LowLevel) brightness levels of the backlight. The two levels must be in the range 0 (minimum) to 8 (maximum). Any other values will produce an error.
The code:
SetU 0,BL_DimTime
SPxCmd1 4,!CPU
Will set the auto-dim timer value to BL_DimTime minutes. The allowable range is 0 to 255 (4h15m). Using 0 dims the backlight instantly.
Example: LCD backlight auto-off timer.
CPU temperature readout Dialect 21 or later
An SPxPoll4 0,!CPU returns the floating point temperature of the CPU chip in °C at locations U(0) –> U(3)
An SPxPoll4 1,!CPU returns the floating point temperature of the CPU chip in °F at locations U(0) –> U(3)